1. Field of the Invention
The present invention relates to an information processing apparatus having a protective function of protecting a peripheral device from accesses of a CPU (Central Processing Unit) and a method of controlling an access to the information processing apparatus.
2. Description of Related Art
A CPU outputs a control signal at the time of accessing a peripheral device, and predetermined processing is carried out. For example, if the peripheral device is a hard disk device, a data read/write task is executed between the CPU and the hard disk device. Upon reading data, the CPU outputs a read signal, and in addition, data is output from a designated address of a hard disk device. Upon writing data, the CPU outputs a write signal, and in addition, data is stored at a designated address of the hard disk device. The control signal output from the CPU contains designated address information of a hard disk as well as a read/write signal.
For example, if important data to protect is stored in the hard disk device, a technique of protecting the data from accesses by the CPU is necessary. Such protection technique is applicable to peripheral devices other than the hard disk device. For example, it is necessary to protect an I/O device such as an interrupt controller or a timer from accesses by the CPU.
Japanese Unexamined Patent Application Publication No. 2003-280988 discloses a technique of protecting a peripheral device from an access by the CPU based on an access request. According to the technique of Japanese Unexamined Patent Application Publication No. 2003-280988, a register for controlling an access by the CPU is provided for each address of a peripheral device, and whether to allow an access or not is set in the control register for each address of a peripheral device. In this way, the technique of Japanese Unexamined Patent Application Publication No. 2003-280988 determines a peripheral device to protect from accesses by the CPU on the address basis.
However, the inventors of the subject application have recognized that the above related art has the following problems. In a control device of Japanese Unexamined Patent Application Publication No. 2003-280988, it is necessary to provide an H/W (Hardware) component such as a register and comparator for allowing/disallowing accesses, for each address of a peripheral device. For example, in the case of protecting an I/O device mapped to a memory-mapped I/O region, it is necessary to protect a wide address range because one I/O device has plural addresses over a wide range. Thus, protection needs to be executed over a wide address range as in this case, there arises a problem that the number of protectable peripheral devices is limited due to limitations on H/W.